Fast multi-operand bit pattern detection method and circuit

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36471511, G06F 700

Patent

active

057242755

ABSTRACT:
A process and associated apparatus for performing bit pattern detection, such as leading one detection and leading transition detection for early normalization of the result of an operation on floating point numbers. Such an operation can be an addition or a subtraction of floating point numbers. In parallel with this operation, this process and associated apparatus divide the operands into bit groups. These bit groups are operated on and represented by states and addresses, which are propagated through several levels to detect the bit pattern.

REFERENCES:
patent: 4926369 (1990-05-01), Hokenek et al.
patent: 5317527 (1994-05-01), Britton et al.
patent: 5383142 (1995-01-01), Chung

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Fast multi-operand bit pattern detection method and circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast multi-operand bit pattern detection method and circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast multi-operand bit pattern detection method and circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2255092

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.