Fast microprocessor stage bypass logic enable

Details Fast microprocessor stage bypass logic enable Fast microprocessor stage bypass logic enable

1996-06-17

1998-07-07

Donaghue, Larry D.

395394, G06F 938

Patent

active

057782482

ABSTRACT:
A method and apparatus for determining data dependencies and enabling bypass logic in parallel. In particular, a given stage in a given execution unit will (1) compare its destination register to the destination registers of the initial stage in each execution unit, and (2) combine the result of the comparison with the propagated results of preceding stages in the given execution unit. The other stages are not checked, as this is covered by similar checking logic in the earlier stages, with the results being passed on to the subsequent stages.

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