Fast, low-noise CMOS output buffer

Details Fast, low-noise CMOS output buffer Fast, low-noise CMOS output buffer

1987-07-22

1989-02-21

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307445, 307473, 3672721, H03K 19094, H03K 1716, H03K 1920

Patent

active

048067946

ABSTRACT:
A CMOS output buffer includes a transient pull-up circuit, a transient pull-down circuit and a keeper circuit. The pull-up circuit is responsive to a high drive enable pulse signal for generating a transition from a low logic level to a high logic level at an output node. The pull-down circuit is responsive to a low drive enable pulse signal for generating a transition from the high logic level to the low logic level at the output node. The keeper circuit is responsive to the high and low drive enable pulse signals so as to maintain the output node at the high logic level after the output node has made the low-to-high transition and to maintain the output node at the low logic level after the output node has made the high-to-low transition. The CMOS output buffer has a high speed of operation and has a high immunity to noise.

REFERENCES:
patent: 3912947 (1975-10-01), Buchanan
IBM Tech. Disc. Bul. "Off-Chip Driver" Askin.
IBM Tech. Disc. Bul. "Receiver for Pseudo-Clocked Cascade Voltage Switch Logic".

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