Fast locking phase-locked loop utilizing frequency estimation

Details Fast locking phase-locked loop utilizing frequency estimation Fast locking phase-locked loop utilizing frequency estimation

1988-06-13

1989-05-02

Griffin, Robert L.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural a.f.s. for a single oscillator

331 1A, 331 25, 329122, H03L 710, H03L 718

Patent

active

048272256

ABSTRACT:
A phase-locked loop compares the loop output clock with the loop input clock in a digital phase detector to provide lead/lag error signal samples. A microprocessor utilizes the lead/lag error samples to track the input clock in a wideband mode matching the bandwidth of the input and in a very narrow band mode. When the system in which the loop is utilized switches to a new input clock source, the microprocessor resets the loop divider chain so that the loop feedback signal is phase coincident with the input reference. The microprocessor tracks the new clock for a predetermined number of error samples in the wideband mode and statistically estimates, from the samples, the frequency of the input. After the frequency estimation, the microprocessor controls the loop VCO to output the computed frequency and switches to the narrow band tracking mode.

REFERENCES:
patent: 4511858 (1985-04-01), Charavit et al.
patent: 4528521 (1985-07-01), Grimes
patent: 4764737 (1988-08-01), Kaatz

Affiliated with

Also associated with

Rating

Fast locking phase-locked loop utilizing frequency estimation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast locking phase-locked loop utilizing frequency estimation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast locking phase-locked loop utilizing frequency estimation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-587964