Fast internal reference cell trimming for flash EEPROM memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518522, 36518533, 36518907, 365201, 365210, G11C 700, G11C 2900

Patent

active

056086695

ABSTRACT:
A method for storing a charge on memory devices which includes the steps of providing a first charging pulse to a memory device to charge the device to a first level less than a final level; testing the value of the charge to determine whether the charge is greater than the first level; if the value of the charge is less than the first level, providing a second set of charging pulses to the memory device, each of the pulses of the second set of pulses having a duration which is a fraction of the duration of the first pulse and a value sufficient to charge the device to the first level; testing the value of the charge to determine whether the charge is greater than the first level after each pulse of the second set of pulses; and once the charge has tested greater than the first level, providing a third set of charging pulses to terminals of the memory device, each of the pulses of the third set of pulses having a duration which is a fraction of the duration of the pulses of the second set of pulses and a value such that the charge furnished by each pulse is approximately equal to an allowable variation of the charge from the final value.

REFERENCES:
patent: 4357685 (1982-11-01), Daniele et al.
patent: 4460982 (1984-07-01), Gee et al.
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5218569 (1993-06-01), Banks
patent: 5222046 (1993-06-01), Kreifels et al.
patent: 5371703 (1994-12-01), Miyamoto
patent: 5381374 (1995-01-01), Shiraishi et al.
patent: 5386388 (1995-01-01), Atwood et al.
patent: 5394362 (1995-02-01), Banks
patent: 5394371 (1995-02-01), Hoffa
patent: 5444656 (1995-08-01), Bauer et al.

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