Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Accelerating switching
Reexamination Certificate
2000-08-29
2001-07-31
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Accelerating switching
C327S478000
Reexamination Certificate
active
06268756
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to a fast high side switch for hard disk drive preamplifiers and, more particularly, to a fast high side switch circuit that provides very fast switching between two terminals (i.e. fast turn-on time), has very low impedance when the switch is “on”, and exhibits very high impedance between the two terminals when the fast high side switch is turned “off”.
Write speeds in hard disk drive preamplifiers are continually improving. An inductive write head includes an inductive coil that can change the localized magnetic fields on the magnetic data-storage medium and thus allows the digital data to be recorded. The speed of this recording process (i.e., the write speed) is determined by how fast the current in a hard disk drive write head can be reversed (the polarity of the write current through the write head being reversed in response to the bit pattern of the information signal). This is also referred to as the “rise-time”. Typically the desired requirements for the write driver are a large current capability (e.g., 40-80 ma) combined with a fast rise time (e.g., 1-4 ns) for driving the inductive write head.
The write head for a disk data storage device can be approximately modeled by an inductor with an inductance of L. The voltage across an inductor is ideally proportional to the rate of change of the current through the inductor in time. The mathematical expression for this voltage is given as V
L
=L di/dt. Essentially, the voltage across the inductive write head, V
L
, is proportional to the value of inductance, L, and to the speed at which the write current is reversed, di/dt. This means that the write current reversal time in inductive write-heads fundamentally depends on how large a voltage can be impressed across the write drive head. Normally, the voltage across the inductor is limited by the supply voltages. Thus, either the head inductance value should be decreased, or, the supply voltage should be increased, to improve the write speed. The first option, decreasing the head inductance value, is normally not preferred, as it negatively affects the reliability of the data-recording process.
Conventional techniques use the power supply to generate the voltage across the inductor. However, the voltage supply limits the voltage that can be applied across the inductor and therefore limits the rise time. Higher write speeds require higher supply voltages. However, the second alternative, increasing the supply voltage, may not always be possible, as system-wide considerations dictate the selection of power supply voltages, and the present trend in fact is the reduction of power supply voltages.
The present invention is therefore directed to the problem of developing a hard disk drive preamplifier that satisfies the demand for improved rise-time while meeting the conflicting demand for maintaining a same supply voltage. This requires a high side switch, whose turn on time is much faster than the rise time, to connect the boost voltage to the inductor.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve these problems by providing a fast high side switch, for fast switching, from a high impedance non-conductive state to a low impedance conductive state, between two terminals.
In one embodiment of the invention, the fast high side switch has a control circuit, including a first input terminal and a second input terminal, for turning the switch on and off at a fast speed, a pnp transistor that is turned on when the first input terminal is high and a first npn transistor, the base coupled to the collector of the pnp transistor, the first npn transistor going into saturation when the pnp transistor turns on. In addition, a second npn transistor is provided, the collector coupled to a first of the two terminals, the emitter coupled to a second of the two terminals, and the base coupled to the emitter of the first npn transistor. The second npn transistor turns on after the first npn transistor goes into saturation, thereby closing the switch and providing a connection between the two terminals. A capacitor is connected between the base and the emitter of the second npn transistor, and the emitter current of the first npn transistor is divided between the base current of the second npn transistor and the capacitor.
In a specific embodiment of the invention the fast high side switch includes a clamp circuit, which comprises a resistor and a plurality of transistors, and in still a further embodiment, the clamp circuit is matched.
In operation the pnp transistor of the fast high side switch, is turned off when the second input terminal is high and the first input terminal is low and the second npn transistor stays high until the capacitor is discharged and then turns off.
The control circuit according to one embodiment includes a differential npn transistor pair, and the tail current of the differential pair may be independently controlled by a third input terminal, which can further be used to turn off the fast high side switch irrespective of the first input terminal and the second input terminal.
In an alternative embodiment of the invention, the fast high side switch includes a control circuit for turning the switch on and off at a fast speed, a first npn transistor and a second npn transistor. The collector of the second npn transistor is coupled to a first of the two terminals, the emitter is coupled to a second of the two terminals and a resistor is coupled between the emitter of the first npn transistor, and the base of the second npn transistor. A capacitor is coupled to the emitter of the first npn transistor and the emitter of the second npn transistor. In this embodiment, the second npn transistor turns on after the first npn transistor goes into saturation, thereby closing the switch and providing a connection between the two terminals.
As a further aspect of one embodiment of the invention, the control circuit includes a third npn transistor that turns on and off under the control of the signals input to the first input terminal and the second input terminal. The third npn transistor is prevented from entering deep saturation by a clamp transistor.
As a still further aspect of one embodiment of the invention, the level of charge on the capacitor is controlled by discharging the capacitor through the resistor and, if the third npn transistor is on, through the third npn transistor. If however, the third npn transistor is off, the capacitor is quickly charged by the emitter current of the first npn transistor.
The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself however may be best understood by reference to the following detailed description taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4654543 (1987-03-01), Atsumi
patent: 4860065 (1989-08-01), Koyama
patent: 5128553 (1992-07-01), Nelson
patent: 5465400 (1995-11-01), Norimatar
patent: 5834964 (1998-11-01), Scheraga
Eskiyerli Murat Hayri
Nayebi Mehrdad
Shapiro Phil
Mayer Fortkort & Williams PC
Sony Corporation
Tran Toan
Williams Esq. Karin L.
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