Fast hardware co-simulation reset using partial bitstreams

Details Fast hardware co-simulation reset using partial bitstreams Fast hardware co-simulation reset using partial bitstreams

2006-01-31

2010-06-15

Shah, Kamini S (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

C703S014000, C703S020000, C703S021000, C713S001000, C713S100000, C716S030000, C716S030000

Reexamination Certificate

active

07739092

ABSTRACT:
A method of resetting a programmable logic device (PLD) for use with hardware co-simulation can include loading a full bitstream into the PLD. The full bitstream can program the PLD with a circuit design to be used with a first simulation. The method further can include loading a partial bitstream into the PLD thereby resetting at least one component of the circuit design that does not have a reset function such that the circuit design is initialized for use in a subsequent simulation.

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