Boots – shoes – and leggings
Patent
1990-03-23
1992-02-25
Mai, Tan V.
Boots, shoes, and leggings
364759, G06F 1531
Patent
active
050918753
ABSTRACT:
Apparatus for generating memory addresses for accessing and storing data in an FFT (Fast Fourier Transform) computation is provided. The FFT computation is typically performed by computing a plurality of FFT butterflies belonging to a plurality of ranks. The apparatus includes a butterfly counter for determining the current FFT butterfly being computed. The butterfly counter produces a plurality of butterfly carries. A rank counter for determining the rank of said current FFT butterfly being computed produces a rank number. Coupled to the rank and butterfly counters is incremental curcuitry, which generates an incremental number in response to the rank number and the butterfly carries. An adder circuitry coupled to the incremental circuitry adds the incremental number and a plurality of memory addresses to produce the FFT data memory addresses.
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patent: 4563750 (1986-01-01), Clarke
patent: 4594687 (1986-06-01), Kaneko et al.
patent: 4630229 (1986-12-01), D'Hondt
Zohar, "Fast Hardware Fourier Transformation Through Counting" IEEE Trans. on Computer, vol. C-22, No. 5, May 1973, pp. 433-441.
Johnson Louis G.
Wong Yiwan
Yoshino Toshiaki
Barndt B. Peter
Donaldson Richard L.
Kesterson James C.
Mai Tan V.
Texas Instruments Incorporated
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