Fast dynamic low-voltage current mirror with compensated error

Details Fast dynamic low-voltage current mirror with compensated error Fast dynamic low-voltage current mirror with compensated error

2007-06-26

2007-06-26

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

Reexamination Certificate

active

11393070

ABSTRACT:
A current mirror comprising: a current source; a first p-channel MOS transistor having a source coupled to an operating potential, and a gate and a drain coupled to the current source; a second p-channel MOS transistor having a source coupled to the operating potential, a gate coupled to the gate of the first p-channel transistor, and a drain; a first n-channel MOS transistor having a source coupled to ground, and a gate and a drain coupled to the drain of the second p-channel transistor; a zero-threshold n-channel MOS transistor having a drain coupled to a current-output node, a gate coupled to the gate of the first n-channel transistor, and a source; and a second n-channel MOS transistor having a source coupled to ground, and a gate coupled to the gate of the first n-channel transistor and a drain coupled to the source of the zero-threshold n-channel transistor.

REFERENCES:
patent: 5672993 (1997-09-01), Runaldue
patent: 5939933 (1999-08-01), Wang
patent: 5966005 (1999-10-01), Fujimori
patent: 6211659 (2001-04-01), Singh
patent: 6351181 (2002-02-01), Vittoz
patent: 6788134 (2004-09-01), Secareanu

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