Boots – shoes – and leggings
Patent
1995-09-11
1998-03-17
Mai, Tan V.
Boots, shoes, and leggings
36476001, G06F 752
Patent
active
057294852
ABSTRACT:
A multiplier in a floating point processor includes a circuit to determine for each bit of the multiplier operand a 3 times booth recode and a booth recode multiplier array which implements a 3 times booth recode multiplication. The multiplier includes logic to determine a fast sign extend to replace bit positions shifted in the array as well as a rounding adder to provide a rounded result while determining the final result from the booth recode multiplier. The multiplier also includes a circuit to determine a contribution to the final multiplication result from a lower order product with out forming the entire product.
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Olesin Andrew S.
Santhanam Sribalan
Wolrich Gilbert M.
Digital Equipment Corporation
Drozenski Diane C.
Fisher Arthur W.
Hudgens Ronald C.
Mai Tan V.
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