Fast DC coupled level translator

Details Fast DC coupled level translator Fast DC coupled level translator

2007-06-21

2009-06-30

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S306000, C327S050000

Reexamination Certificate

active

07554378

ABSTRACT:
A level translator has an inverter comprising a first transistor having a first predetermined voltage threshold and a second transistor having a second predetermined voltage threshold. The two transistors have control gates being of complementary conductivity. A first capacitor is connected at one end to the gate of the first transistor and at a second end to an input signal. A second capacitor is connected at one end to the gate of the second transistor, the input signal being applied to a second end of the second capacitor. A comparator is used for detecting the relationship between the input signal and a reference voltage. A first current mirror has one terminal connected to an output of the comparator, and another terminal connected to the gate of the first transistor. A second current mirror has one terminal connected to an output of the comparator, and another terminal connected to the gate of the second transistor. A first clamp circuit is used for limiting a gate voltage of said first transistor. A second clamp circuit is used for limiting a gate voltage of said second transistor.

REFERENCES:
patent: 5025177 (1991-06-01), Mounger

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