Fast data transfer bus

Details Fast data transfer bus Fast data transfer bus

1994-09-27

1997-06-10

Chin, Stephen

Pulse or digital communications

Cable systems and components

375219, H04B 300, H04L 2500

Patent

active

056384025

ABSTRACT:
A bus transceiver in a first signal processing circuit is connected to one end of a first bus connecting line for transferring a data pulse signal. A bus transceiver in a second signal processing circuit is connected to one end of a second bus connecting line for transferring a data pulse signal. Connected to the other end of the first bus connecting line is a first termination resistor. Connected to the other end of the second bus connecting line is a second termination resistor. In a portion of a predetermined length (parallel coupling portion) in the first and second bus connecting lines, the interval between the first and second bus connecting lines is held substantially constant so as to produce capacitive and inductive coupling between both the bus connecting lines. Each of the first and second bus transceivers includes a bus driver and a bus receiver. The bus receiver in the first bus transceiver generates a pulse signal substantially equal to an output pulse signal which was generated from the bus driver in the second bus transceiver, based on a pulse waveform induced in the parallel coupling portion on the first bus connecting line by the output pulse signal from the second bus transceiver.

REFERENCES:
patent: 3516065 (1970-06-01), Bolt et al.
patent: 3619504 (1971-11-01), DeVeer et al.
patent: 3764941 (1973-10-01), Nick
patent: 3786418 (1974-01-01), Nick
patent: 4380080 (1983-04-01), Rattlingourd

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