Fast data alignment display queue structure for image block tran

Details Fast data alignment display queue structure for image block tran Fast data alignment display queue structure for image block tran

1996-12-05

1999-06-29

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Interface

345513, 345515, 711201, G06F 1300

Patent

active

059175060

ABSTRACT:
A fast data alignment display queue structure for image block transfer comprises a shift circuit, a bit mask, a multi-layer FIFO buffer and a plurality of multiplexers, wherein input data are shifted a desired number of bytes by the shift circuit, and written to the FIFO buffer, and then the data in each level of the FIFO buffer are read by an external DRAM. By using the structure above, a block can be shifted to right or left by filling the data to the FIFO buffer in the sequence started from the first level or in the sequence started from the last level. Therefore, shifting operation for a block can be implemented in different directions without additional transfer logic.

REFERENCES:
patent: 4644569 (1987-02-01), Brown et al.
patent: 5095422 (1992-03-01), Horiguchi
patent: 5287452 (1994-02-01), Newman
patent: 5493646 (1996-02-01), Guttag et al.

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