Fast converter for left-to-right carry-free multiplier

Details Fast converter for left-to-right carry-free multiplier Fast converter for left-to-right carry-free multiplier

1997-05-05

1999-07-27

Malzahn, David H.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 752

Patent

active

059283173

ABSTRACT:
A multiplier generates an array of partial products. The partial products are reduced in the more significant side of the array assuming a carry-out from the less significant side of the array as taking on a first state to produce a first set of reduced products. The partial products are also reduced in the more significant side of the array assuming a carry-out from the less significant side of the array as taking on a second state to produce a second set of reduced products. Both sets of reduced partial products are generated in parallel with the carry-out from the least significant side. The first set of reduced products are selected as the reduced products of the more significant side of the array when the carry-out from the less significant side of the array takes on the first state. The second set of reduced products are selected as the reduced products of the more significant side of the array when the carry-out from the less significant side of the array takes on the second state. There is a one multiplexer delay from generation of the carry out from the less significant side until the final products are available from the more significant side.

REFERENCES:
patent: 4858168 (1989-08-01), Hwang
patent: 4887233 (1989-12-01), Cash et al.
patent: 5012439 (1991-04-01), Nash et al.
patent: 5138570 (1992-08-01), Argade
patent: 5146421 (1992-09-01), Adiletta et al.
patent: 5283755 (1994-02-01), Bechade
patent: 5619443 (1997-04-01), Schwarz et al.
Paper to be submitted to CICC 1997 entitled "VLSI Implementation of a 200-MHz 16.times.16 Left-to-Right Carry-Free Multiplier in 0.35 um CMOS Technology for next-generation DSPs" by Ravi K. Kolagotla, et al., Lucent Technologies, Allentown, PA (4 pages).
IEEE--1993 publication entitled "n.times.n Carry-Save Multipliers without Final Addition" by Montuschi et al., Torino Italy, pp. 54-61.
IEEE Transactions on Computers, vol. 39, No. 11, Nov. 1990, entitled "Fast Multiplication Without Carry-Propagate Addition" by Ercegovac, et al., pp. 1385-1390.
IEEE Transactions on Computers, vol. 42, No. 10, Oct. 1993 entitled "A Reduced-Area Scheme for Carry-Select Adders" by Tyagi, pp. 1163-1170.
Quart, Journ. Mech. and Applied Math, vol. IV Pt. 2 (1951) pp. 236-240 entitled "A Signed Binary Multiplication Technique" by Andrew D. Booth.
IEEE Transactions on Computers, vol. C-36, No. 7, Jul. 1987, pp. 895-897 entitled "On-the-Fly Conversion of Redundant into Conventional Representations" by Ercegovac, et al.
Proceedings of the IRE, Jan. 1961, pp. 67-91 entitled "High-Speed Arithmetic in Binary Computers" by MacSorley.

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