Fast CMOS buffer for TTL input levels

Details Fast CMOS buffer for TTL input levels Fast CMOS buffer for TTL input levels

Filed on

1981-11-16

Date issued

1984-02-07

Examiner

Miller, Stanley D.

Patent Class

Electrical transmission or interconnection systems

SubClass

Nonlinear reactor systems

SubSubClass

Parametrons

Other Related Categories

307491, 307475, 330300, H03K 1730, H03K 1714

Type

Patent

Status

active

Patent number

044305826

Description

ABSTRACT:
A CMOS integrated circuit is made compatible with TTL input signals. A regulator operates the CMOS gates in an array at a voltage that is slightly lower than the supply. The regulator sense circuit is made responsive to an operating gate and to a TTL bias reference. Accordingly, the regulator will compensate for changes in ambient conditions and manufacturing variations so that the gate array devices will reliably respond to TTL level switching signals.

REFERENCES:
patent: 3657575 (1972-04-01), Taniguchi et al.
patent: 4004164 (1977-01-01), Cranford, Jr. et al.
patent: 4127783 (1978-11-01), Alaspa
patent: 4135125 (1979-01-01), Oura
patent: 4163161 (1979-07-01), Walker
patent: 4260946 (1981-04-01), Wheatley, Jr.
patent: 4300061 (1981-11-01), Mihalich et al.

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