Fast chip erase mode for non-volatile memory

Details Fast chip erase mode for non-volatile memory Fast chip erase mode for non-volatile memory

1999-04-14

2000-08-08

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518514, 36518526, G11C 1604

Patent

active

061011290

ABSTRACT:
A method for fast chip erase of memory cells in a non-volatile memory array comprises the steps of providing an acceleration voltage greater than the internal pump voltage supplied by a conventional internal voltage supply pump, providing an erase write command, and performing a fast erase operation on the memory cells, comprising the step of coupling the acceleration voltage to the sources of the memory cells in a plurality of sectors simultaneously. In an embodiment, a fast preprogramming operation is performed on the memory cells prior to the step of performing the fast erase operation in the fast chip erase mode. In a further embodiment, a fast weak programming (APDE) operation is performed on the memory cells subsequent to the step of performing the fast erase operation in the fast chip erase mode. In an additional embodiment, the step of performing the fast erase operation further comprises the steps of detecting the acceleration voltage, generating an acceleration voltage indicator signal in response to the detection of the acceleration voltage, and generating a fast chip erase write command in response to the acceleration voltage indicator signal and the erase write command.

REFERENCES:
patent: 5378643 (1995-01-01), Ajika et al.
patent: 5646885 (1997-07-01), Matsuo et al.

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