Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1999-07-22
2001-02-20
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C324S678000, C324S677000
Reexamination Certificate
active
06191723
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to measurement of capacitance, and in particular to a method of optimizing timing parameters to provide fast capacitance measurement.
Capacitance measurement has become an important feature of measuring instruments such as digital multimeters. U.S. Pat. Nos. 5,073,757 and 5,136,251, both of which are assigned to Fluke Corporation, disclose methods of measuring small and large capacitances in which an unknown capacitor was allowed to fully charge to a reference voltage at its RC rate, while at the same time a current proportional to the charging current was accumulated on the storage capacitor of a dual-slope integrating analog-to-digital converter (ADC). Small capacitances could fully charge in one integrate cycle of the ADC, while large capacitances required several integrate cycles to fully charge. In both cases, the proportional charge stored on the integrating ADC's storage capacitor was removed during “de-integrate” cycles over periods of time dictated by the amount of stored charge, and the time was measured to give an indication of capacitance value.
Not only were these prior art capacitance measurement techniques unsatisfactory due to inordinately long measurement times because of the wait for the unknown capacitor to charge fully, but they were incompatible with the timing and mechanics of multislope integrating ADCs that began to supplant dual-slope integrating ADCs.
Multislope ADCs, an example of which is disclosed in U.S. Pat. No. 5,321,403, assigned to Fluke Corporation, exhibit faster and more accurate measurements than the dual-slope ADCs. That is, rather than the single-slope integrate cycle of a dual-slope ADC, multi-slope ADCs add and remove known amounts of charge during the integrate cycle to keep the final stored charge at a relatively low value. This of course results in a substantially reduced “de-integrate cycle” in which the final quantity is measured very quickly and algebraically summed with the known added or subtracted charges.
The foregoing difficulties were overcome by the improved capacitance measurement system disclosed in corresponding U.S. patent application Ser. No. 09/267,504, filed Mar. 12, 1999, wherein the improvement included use of a constant current source to generate a linear ramp voltage across the capacitor being measured. Both measurement speed and accuracy were improved for a wide range of capacitors; however, for large capacitors in particular, long time periods, e.g., up to several minutes for an incompletely discharged 50,000 &mgr;F capacitor, were still required to accurately determine the capacitance value.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method of measuring capacitances is provided in which measurement speed is increased by optimizing timing parameters to rapidly charge and discharge the capacitor in small increments about an equilibrium voltage.
The capacitor is charged at a linear rate by applying a predetermined constant current thereto, and discharged at an exponential rate determined by the RC time constant in the discharge path. Incremental charge and discharge times are selected in such a manner that results in an equilibrium voltage at a point where the charge voltage ramp and discharge voltage curve would cross if they were superimposed on one another. By appropriate selection of the incremental charge and discharge times, the equilibrium voltage, and hence, the voltage charge ramp, may be conveniently established at a point within the range of a measuring analog-to-digital converter (ADC).
The voltage difference over the incremental charge time may be measured on one cycle and utilized to compute the capacitance value.
In an embodiment built and tested in accordance with the method of the present invention, a 50,000 &mgr;F capacitor was measured in under 2.5 seconds, which is about an order of magnitude faster than was previously attainable.
It is therefore one object of the present invention to provide a method for fast capacitance measurement.
It is another object of the present invention to provide a method for fast capacitance measurement in which existing measurement systems may be used.
It is a further object of the present invention to provide a method for fast capacitance measurement in which timing parameters are optimized by selecting incremental charge and discharge time intervals.
Other objects, features, and advantages of the present invention will become obvious to those having ordinary skill in the art upon a reading of the following description when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4853719 (1989-08-01), ElHatem et al.
patent: 5073757 (1991-12-01), George
patent: 5136251 (1992-08-01), George et al.
patent: 5146412 (1992-09-01), Jones
patent: 5450014 (1995-09-01), Lee
patent: 5646539 (1997-07-01), Codina et al.
patent: 5694051 (1997-12-01), Ueyama et al.
Irwin (Basic Engineering Circuit Analysis, 1987, Macmillan Publishing Co. pp216, 247-248).
Fluke Corporation
Noe George T.
Paik Steven S.
Tokar Michael
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