Fast calculation circuit for cyclic redundancy check code

Details Fast calculation circuit for cyclic redundancy check code Fast calculation circuit for cyclic redundancy check code

1989-06-06

1992-03-03

Smith, Jerry

Excavating

G06F 1110, H03M 1300

Patent

active

050938312

ABSTRACT:
A fast calculation circuit for a cyclic redundancy check code of compressed data having a compressed area and an uncompressed area, the compressed area containing at least a data byte representative of the content of consecutive same data bytes and a data byte representative of the number of consecutive same data bytes. The fast calculation circuit includes a cyclic redundancy check code calculation unit for calculating a cyclic redundancy check code of data in the uncompressed area by using a generating polynominal; a fast calculation matrix unit for storing beforehand a plurality of cyclic redundancy check code calculation results of data contents and consecutive data byte numbers; and a detection unit for detecting the compressed area; wherein when the detection unit detects the compressed area, a cyclic redundancy check code of data in the detected compressed area is calculated by the fast calculation matrix unit, and when the detection unit does not detect the compressed area, a cyclic redundancy check code of data in the uncompressed area is calculated by the cyclic redundancy check code calculation unit.

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