Fast bi-linear interpolation pipeline

Details Fast bi-linear interpolation pipeline Fast bi-linear interpolation pipeline

1996-04-26

1998-09-01

Chow, Dennis-Doon

Computer graphics processing and selective visual display system

Display peripheral interface input device

Light pen for fluid matrix display panel

395 139, 382298, 348581, 365132, G09G 500

Patent

active

058016783

ABSTRACT:
A high-speed real-time bi-linear interpolation apparatus is disclosed for scaling an old M.times.M' image into a new N.times.N' image by which the pixel value of a new pixel q(x', y') is interpolated from the pixel values of four immediately enclosing old pixels, p(x, y), p(x+1, y), p(x, y+1), and p(x+1, y+1). The fast bi-linear interpolation apparatus comprises: (a) a counter for obtaining the x-directional and y-directional pixel counts of the new pixel (x', y'), designated as n and n', respectively; (b) an accumulator for calculating the x-directional and y-directional pixel counts of the he old pixel (x, y), designated as m and m', respectively; (c) logic circuits associated with the accumulator means for calculating x-directional and y-directional interpolation parameters Acc and Acc', respectively, wherein Acc is the numerator of fraction after the division of (n.multidot.M.div.N), and Acc' is the numerator of fraction after the division (n'.multidot.M'.div.N'); (d) first quantizer for quantizing Acc/N into K.sub.x /2.sup.i, wherein i is an integer greater than 1; (e) second quantizer for quantizing Acc'/N' into K.sub.y /2.sup.i ; (f) first, second, and third interpolation pipelines, wherein the first and second interpolation pipelines are connected in parallel for obtaining first and second interpolated values from p(x, y) and p(x+1, y), and from p(x, y+1) and p(x, y), respectively, and the third interpolation pipeline is provided to obtain q(x', y') from the first and second interpolated values; and (g) a delay circuit for delaying the execution of the third interpolation pipeline until the executions of the first and second interpolation pipelines are completed. Since only very simple components, such as adders, hard-wired fixed-value multipliers and multiplexers, are used to perform the bi-linear interpolation, extremely fast speed is achieved on a real time basis.

REFERENCES:
patent: 4402012 (1983-08-01), Knight
patent: 4988984 (1991-01-01), Gonzalez-Lopez
patent: 4990902 (1991-02-01), Zenda
patent: 5054100 (1991-10-01), Tai
patent: 5301265 (1994-04-01), Itoh

Affiliated with

Also associated with

Rating

Fast bi-linear interpolation pipeline does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast bi-linear interpolation pipeline, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast bi-linear interpolation pipeline will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-274326