Fast and memory protected asynchronous message scheme in a...

Electrical computers and digital processing systems: interprogra – Interprogram communication using message

Reexamination Certificate

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C719S314000, C719S318000, C719S330000

Reexamination Certificate

active

07549151

ABSTRACT:
An asynchronous message passing mechanism that allows for multiple messages to be batched for delivery between processes, while allowing for full memory protection during data transfers and a lockless mechanism for speeding up queue operation and queuing and delivering messages simultaneously.

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McKenny, M. et al., “Transporting multiple classes of traffic over a generic routing device—An investigation into the performance of the RapidIO™ interconnect architecture,” 2003 IEEE, pp. 39-44.
Strass, H., “Abschied vom Bus: RapidIO,”Electronik, vol. 49, No. 24, Nov. 28, 2000, pp. 52-55.

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