Fast and gate with programmable output polarity

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

3072021, 307466, 307445, 307458, 371 25, 34082584, H03K 1920, H03K 19082, H03K 19003, G06F 1128

Patent

active

046381899

ABSTRACT:
The present invention combines in either a logical AND function of N logical input signals, where N is a selected positive integer greater than or equal to 1, and provides programmably, either a direct AND output signal or a NAND output signal. The invention accomplishes this using a minimum number of components in the data path, between the logical input leads and logical output leads. A minimum of components in the data path reduces the propagation delay introduced by the circuit. The invention accomplishes this by providing two AND gates connected to the same set of N logical input signals. The output signal of one AND gate is inverted by an inverter with an enable/disable input lead. The output signal of the other AND gate is inverted twice by two inverters. The second inverter has an enable/disable input lead. Means are provided for exclusively enabling one or the other of the two inverters with an enable/disable input lead. Thus, either the once inverted signal is provided to the output lead or the twice inverted signal is provided to the output lead.

REFERENCES:
patent: 4124899 (1978-11-01), Birkner et al.
patent: 4157480 (1979-06-01), Edwards
patent: 4422072 (1983-12-01), Cavlan
patent: 4490812 (1984-12-01), Guterman
patent: 4499579 (1985-02-01), Still et al.
patent: 4533841 (1985-08-01), Konishi

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