Fast adder chain

Details Fast adder chain Fast adder chain

1993-05-25

1995-11-28

Malzahn, David H.

Boots, shoes, and leggings

G06F 752

Patent

active

054714133

ABSTRACT:
A fast adder chain for adding together at least one pair of digital words and including a plurality of cascade connected adder blocks. Each block including adders for obtaining the pseudosum of portions of the digital word pair and latches for storing and transmitting the pseudosum to the next block and the pseudocarry from each adder to the chain end.

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IEE Proceedings G. Electronic Circuits & Systems, vol. 133, No. 5 Oct. 1986, Stevenage GB pp. 256-264, H. Yung et al., "Recursive addition and its parameterisation in VLSI".
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