Fast-acquisition phase-locked loop

Details Fast-acquisition phase-locked loop Fast-acquisition phase-locked loop

2001-11-01

2004-04-06

Choe, Henry (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

C331S025000, C327S147000

Reexamination Certificate

active

06717475

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The invention relates to phase-locked loops (PLL's) and more particularly to compensating for variances in tuning voltage of a voltage-controlled oscillator (VCO) of a PLL during deactivated times of the PLL.
2. Background of the Invention
Portable telephones, such as cellular telephones, are very popular and becoming more popular and widespread every day. People enjoy the convenience of having a phone at their disposal no matter where they are. Impinging upon this convenience is the need to recharge the battery of the telephone periodically. If this time between recharges can be made longer, then the telephone becomes more convenient and useful.
To reduce battery power consumption, portable telephones sometimes are made to have an operating state called a paging mode. In this mode, the phone periodically turns on the phone's receiver to check whether there is an incoming call. The phone is only on (activated) for a short period of time, and off (deactivated) for times between the on times, thus saving total average current and improving standby time (i.e., time when the phone is not in use).
SUMMARY
A number of technical advances are achieved in the art by implementation of a fast-acquisition PLL for reducing PLL lock time. The fast-acquisition PLL may be broadly conceptualized as a system that compensates for VCO leakage current; thus reducing or eliminating frequency acquisition time.
For example, a fast-acquisition PLL that periodically activates and deactivates may utilize a system architecture that recognizes that VCO tuning voltage when the PLL is activated and the when PLL is locked (the VCO-lock voltage) is related to the lost charge while the PLL is deactivated. An implementation of the system architecture may include a charge pump, a loop filter connected to the charge pump, a VCO connected to the loop filter, a controller connected to the VCO, and a current source connected to the controller and the loop filter. The controller monitors a VCO tuning voltage at a VCO input and determines the amount of voltage lost during a deactivated time of the PLL, e.g., according to a difference between the VCO-lock voltage and the tuning voltage when the PLL is activated. The controller provides a signal to the current source indicating the lost voltage. In response to the signal from the controller, the current source provides current to the loop filter to compensate for leakage current to help maintain the tuning voltage of the VCO at the VCO-lock voltage, or at least help ensure that the tuning voltage is approximately at the VCO-lock voltage when the PLL is activated. The current source may be several current sub-sources, such as current mirrors, that provide amounts of current that are related to each other, e.g., by a binary progression. The current sub-sources can be selected to provide appropriate amounts of current based on the signal from the controller. The current may be provided continuously throughout the deactivated time or may be provided during a portion of the deactivated time that is less than the entire deactivated time.
Another implementation of the fast-acquisition PLL may also utilize a system architecture that includes a charge pump, a loop filter connected to the charge pump, a VCO connected to the loop filter, and a controller connected to the VCO. In this implementation, the charge pump is responsive to the signal from the controller to turn on for at least a portion of the deactivated time of the PLL to provide sufficient charge to the VCO such that the tuning voltage when the PLL is activated is approximately at the VCO-lock voltage. The charge may be provided in one or more pulses and may be at an initial portion of the deactivated time of the PLL, or later.
In either implementation, the controller can determine the lost charge from the VCO using techniques other than monitoring the VCO tuning voltage. For example, the controller can integrate charge provided to the loop filter by the charge pump during active time periods of the PLL. Alternatively, the controller can integrate an error signal provided by a phase detector of the PLL to the charge pump during active time periods of the PLL, e.g., from the time the PLL is activated until the PLL locks.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.


REFERENCES:
patent: 5920233 (1999-07-01), Denny
patent: 6157271 (2000-12-01), Black et al.
patent: 6466096 (2002-10-01), DeVito

Affiliated with

Also associated with

Rating

Fast-acquisition phase-locked loop does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fast-acquisition phase-locked loop, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast-acquisition phase-locked loop will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3260343