Fast acquisition phase-lock loop

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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307526, 328133, 331 11, 331 17, 331 27, H03L 710, H03D 1300

Patent

active

045874964

ABSTRACT:
A PLL frequency detector or comparator is provided having an up-down counter, responsive to beat signals produced by the input periodic waveforms of the VCO reference signals and the input data signals, to produce top and bottom output signals which enable multivibrators connected to each of the input signal lines to transmit overflow and underflow output pulses, whose sum is proportional to the difference in frequency of the input signals up to a predetermined maximum level, as control signals for the PLL loop filter. The up-down counter may include three or more states with buffer states which prevent generation of overflow or underflow output signals when the PLL is within a predetermined region of phase-lock and the sign of the beat signal oscillates. The up-down counter may also be employed simultaneously as a phase detector or comparator, wherein the top and bottom output signals are combined so as to produce control signals for the PLL loop filter when the overflow and underflow output signals are not generated.

REFERENCES:
patent: 3472960 (1969-10-01), Gutleber et al.
patent: 4015083 (1977-03-01), Bellisio
patent: 4128811 (1978-12-01), Englund, Jr.
patent: 4215430 (1980-07-01), Johnson, Jr.
patent: 4267514 (1981-05-01), Kimsey
patent: 4510461 (1985-04-01), Dickes et al.
Rae et al., "Variable Frequency Oscillator Using a Frequency Discriminator", IBM Technical Disclosure Bulletin, vol. 27, No. 1A, Jun. 1984, pp. 355-357.
"Generalized Phase Comparators for Improved Phase-Locked Loop Acquisition"; James F. Oberst, IEEE Trans. on Comm. Tech. V COM-19, pp. 1142-1148, Dec. 1971.
"Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery", D. G. Messerschmitt, IEEE Trans. Comm. v COM-27 v 9, Sep. 1979, pp. 1288-1295.

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