Fast acquisition circuit for synchronous digital receiver operat

Details Fast acquisition circuit for synchronous digital receiver operat Fast acquisition circuit for synchronous digital receiver operat

1985-10-02

1987-07-14

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

375120, 455265, H04L 2706

Patent

active

046807780

ABSTRACT:
A signal acquisition circuit for a synchronous receiver that requires frequency sweep to acquire a digitally modulated signal but tends to false lock onto data sidebands or for a receiver that cannot use a frequency discriminator because of wideband noise. The receiver must provide a phase error output signal and also a signal-acquired indication that does not assert during false locks. The circuit comprises an integrator selectively coupled either to the phase error signal or to a square wave sweep waveform used for signal acquisition. The integrator is controlled by a detector output analysis circuit that compares the envelope of the signal received during frequency sweeps with the peak of the envelope determined from successive sweeps by a peak detector with a long time constant. The circuit avoids false locks and continues to sweep through successive false locks until the signal-acquired indication asserts to indicate true lock.

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patent: 4481489 (1984-11-01), Kurby
patent: 4514855 (1985-04-01), Lang et al.
patent: 4568888 (1986-02-01), Kimura et al.
patent: 4584710 (1986-04-01), Hansen

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