Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1987-11-12
1989-05-23
Fears, Terrell W.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
365210, 365226, 307279, G11C 800, G11C 702, H03K 338
Patent
active
048336564
ABSTRACT:
A semiconductor memory device comprises a row address buffer (5') which operates in response to an external address signal (A.sub.0 .about.A.sub.7) for generating an internal address signal (A.sub.n, A.sub.n) from the supplied external address signal. Row decoding is performed in response to an external clock signal RAS.
REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.
patent: 4651029 (1987-03-01), Oritani
patent: 4675850 (1987-06-01), Kumanoya et al.
Fears Terrell W.
Koval Melissa J.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Fast access circuit for dynamic type semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fast access circuit for dynamic type semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fast access circuit for dynamic type semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1735465