Multiplex communications – Wide area network – Packet switching
Patent
1989-11-02
1991-02-19
Dwyer, James L.
Multiplex communications
Wide area network
Packet switching
379410, H04B 320
Patent
active
049950304
ABSTRACT:
A full duplex communications apparatus, having at each of a plurality of modem stations a transmitter and a receiver circuitry communicating with a two-wire system, receives signals having both a noise free signal component and a noise signal component. The noise signal component includes a far end echo signal which tends to corrupt and distort the received signal hence increasing the error rate. A method and apparatus for reducing the effect of the far end echo signal at the receiver, in particular a receiver using quadrature detection and equalization circuitry, provide a far end echo cancellation circuitry responsive to error signals generated by the receiver decision circuitry. The cancellation circuitry uses a synchronized reference signal from the transmitter of the station. The echo cancellation circuitry output signals are linearly combined with the output of the equalization circuitry (operating on the received signal) and the resulting equalized and compensated signal output is delivered to the receiver detection circuitry. The far end echo cancellation signal circuitry operates in parallel with the receiver equalization circuitry. The reference signal applied to the echo cancellation circuitry is derived from the transmitter at the station and is synchronized to the received clock signals. That received signal is typically different in both frequency and phase from the transmitter signal and digital domain processing is advantageously provided for generating the reference signal. Alternatively, a more expensive analog approach for generating the reference signal can be employed.
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Dwyer James L.
Memotec Datacom, Inc.
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