False sync code protection (FSP) decoding by software

Details False sync code protection (FSP) decoding by software False sync code protection (FSP) decoding by software

2003-10-21

2008-09-16

Pham, Chi H. (Department: 2616)

Multiplex communications

Diagnostic testing

Determination of communication parameters

C370S478000, C370S503000, C370S520000, C725S070000, C725S071000

Reexamination Certificate

active

07426187

ABSTRACT:
This invention describes a false sync code protection (FSP) decoding technique by software for removing padding binary numbers from video data signals in electronic devices such as camera-phones. These padding binary numbers (e.g., a byte 101001012) are encoded in the video data signal. The invention describes a fast method for carrying out the decoding process using a predetermined criterion without need for separately comparing the received data using bit-by-bit process, and thus significantly reducing the number of processor instructions compared to the conventional bit-by-bit method. For the presented example these instructions are executed for every stand-alone zero byte found within e.g. JPEG data, which leads to considerable savings in execution time, especially if several JPEG images are taken and processed consecutively.

REFERENCES:
patent: 4270148 (1981-05-01), Adachi
patent: 5696867 (1997-12-01), Lee
patent: 6119195 (2000-09-01), Ellis et al.
patent: 6310897 (2001-10-01), Watanabe et al.
patent: 6697989 (2004-02-01), Maeda et al.
patent: 6888569 (2005-05-01), Fox et al.
patent: 2004/0252332 (2004-12-01), McCoog et al.

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