Fairness algorithm for full-duplex buffer insertion ring

Multiplex communications – Wide area network – Packet switching

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Details

370 8515, 370 8512, 370 854, 34082505, H04J 316

Patent

active

049264184

ABSTRACT:
The invention describes a method for transmitting data on a full-duplex buffer insertion ring. Access to the ring by each node is regulated by circulating control message around the ring. The message indicated to each node the maximum number of packets that it may transmit during the interval from the reception of one control message to the forwarding of a subsequent control message. With this invention a station need not be in possession of the control message in order to transmit a packet. A node will also hold a control message if it has not transmitted a predetermined minimum number of packets in its output buffer in a given time interval.

REFERENCES:
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patent: 4556098 (1986-01-01), Gammag et al.
patent: 4566097 (1986-01-01), Bederman
patent: 4663748 (1987-05-01), Karbowiak et al.
patent: 4685105 (1987-08-01), Shikama et al.
patent: 4745598 (1988-05-01), Ulug
patent: 4805170 (1989-02-01), Fergeson et al.
patent: 4809267 (1989-02-01), Higuchi et al.
IBM Technical Disclosure Bulletin vol. 27, No. 11, Apr. 1985, "Data Path Controlling Mechanism".

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