Failure-resistant pseudo-nonvolatile memory

Static information storage and retrieval – Plural shift register memory devices

Patent

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Details

307221R, 365222, G11C 2100

Patent

active

041330447

ABSTRACT:
Disclosed is a plurality of parallel resistive-capacitive clamping circuits ndividually coupling the bit "input" and bit "output" terminals of a multi-bit, serial/parallel (S/P), synchronous/asynchronous (S/A) shift register (e.g., CD-4034A). The clamping circuits provide the contents of the shift register with an increased immunity from the effects of transients, radiation, and temporary power failures.

REFERENCES:
patent: 4065756 (1977-12-01), Panigrahi

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