Failure analyzing system and method for displaying the failure

Details Failure analyzing system and method for displaying the failure Failure analyzing system and method for displaying the failure

2006-07-04

2006-07-04

Trieu, Van T. (Department: 2636)

Communications: electrical

Condition responsive indicating system

Specific condition

C340S653000, C356S394000, C365S201000

Reexamination Certificate

active

07071833

ABSTRACT:
A failure analyzing system for displaying a position of a failure in a semiconductor device, includes: a circuit position memory for storing physical positions of respective circuits included in the semiconductor device; a defective information acquisition unit for acquiring information on a defective circuit included in the semiconductor device; and a display for displaying the defective circuit on a layout of the semiconductor device with a color that is different between the physical positions.

REFERENCES:
patent: 5493236 (1996-02-01), Ishii et al.
patent: 5760892 (1998-06-01), Koyama
patent: 5994715 (1999-11-01), Ide
patent: 6016278 (2000-01-01), Tsutsui et al.
patent: 6388747 (2002-05-01), Nara et al.
patent: 6421122 (2002-07-01), Nara et al.
patent: 6476913 (2002-11-01), Machida et al.
patent: 6480279 (2002-11-01), Nara et al.
patent: 6504609 (2003-01-01), Nara et al.
patent: 6532182 (2003-03-01), Ogawa et al.
patent: 6567168 (2003-05-01), Nara et al.
patent: 6759655 (2004-07-01), Nara et al.

Affiliated with

Also associated with

Rating

Failure analyzing system and method for displaying the failure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Failure analyzing system and method for displaying the failure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Failure analyzing system and method for displaying the failure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3543039