Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-04-02
2002-10-29
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
With measuring or testing
C438S015000, C257S778000
Reexamination Certificate
active
06472234
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a failure analysis method for a ball grid array (BGA)-type semiconductor device including a bare chip (flip-chip type semiconductor chip).
2. Description of the Related Art
A BGA-type semiconductor device is typically constructed by a flip-chip type semiconductor chip having pads, micro solder bumps formed on the pads, an interposer substrate formed on the micro solder bumps and solder balls formed on the interposer substrate. Additionally, a heat spreader is mounted on the back surface of the semiconductor chip.
Although it is possible to determine whether the above-mentioned BGA-type semiconductor device is normal or defective, it is impossible to perform a failure analysis operation upon the BGA-type semiconductor device, particularly, the semiconductor chip, since the semiconductor chip faces down.
Note that, after BGA-type semiconductor devices are shipped, customers may request a failure analysis operation on failed BGA-type semiconductor devices. In this failure analysis operation, it is impossible to accurately detect a failure due to the above-mentioned fact that the semiconductor chip is facing down.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a failure analysis method for a BGA-type semiconductor device capable of accurately detecting a failure in a flip-chip type semiconductor chip therein.
According to the present invention, in a failure analysis method for a BGA type semiconductor device comprising a semiconductor chip having pads, first solder balls, an interposer substrate and second solder balls, the second solder balls and the interposer substrate are removed from the semiconductor device, and then, the first solder balls are removed from the semiconductor device. Then, the semiconductor device is mounted on a package, and a wire bonding operation is performed between the pads of the semiconductor chip and bonding pads of the package. Finally, a test operation is performed upon the semiconductor chip by mounting the package on a tester.
REFERENCES:
patent: 5904489 (1999-05-01), Khosropour et al.
patent: 6117352 (2000-09-01), Weaver et al.
patent: 6245586 (2001-06-01), Colvin
Elms Richard
Wilson Christian D.
Young & Thompson
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