Data processing: vehicles – navigation – and relative location – Vehicle control – guidance – operation – or indication – With indicator or control of power plant
Reexamination Certificate
2000-05-25
2001-12-25
Dolinar, Andrew M. (Department: 3747)
Data processing: vehicles, navigation, and relative location
Vehicle control, guidance, operation, or indication
With indicator or control of power plant
C700S079000
Reexamination Certificate
active
06334084
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a fail-safe apparatus and a fail-safe method for an electronic control system, and particularly, to a fail-safe technique for an electronic control system of an automotive engine.
DESCRIPTION OF THE RELATED ART
Heretofore, there has been known an electronic controlled throttle valve for an automotive engine, comprising an actuator such as a motor for open/close driving a throttle valve, in which the actuator is controlled by a microcomputer (Japanese Unexamined Patent Publication No. 9-287494).
Moreover, in the above-mentioned electronic controlled throttle valve, the reading/writing of the RAM used for control is diagnosed, and when read/write error occurs, the procedure is shifted to a fail-safe control. Further, the fail-safe control system may be duplexed, and the diagnosis result may be processed by each of the duplex systems, so that a fail-safe control signal would be output when at least one of the two fail-safe control systems is operating normally.
However, if the read/write error is caused by a failure of bit line or word line, the RAM region with which the fail-safe control is performed (for example, the region storing a flag showing the diagnosis result or the fail-safe request) may also become abnormal, and the transition to the fail-safe control procedure may not be carried out properly.
In other words, the conventional fail-safe apparatus is equipped with duplex systems having the same logic construction. Therefore, when a failure of bit line or word line causes an error of the RAM over a wide range, so that the flags of both duplex systems are shifted to the same direction, there is a possibility that both duplex systems will be operated erroneously, and that transition to the fail-safe control procedure can not be carried out.
SUMMARY OF THE INVENTION
The present invention aims at solving the above-mentioned problems. The object of the invention is to provide a fail-safe apparatus and a fail-safe method for an electronic control system, being capable of performing a fail-safe control reliably, even when a failure occurs to a bit line or a word line of a RAM.
In order to achieve the above object, according to the present invention, the construction is such that duplex fail-safe control systems have mutually reverse logic for logic operation, and in one fail-safe control system, a fail-safe request state is denoted when the logic is 0, whereas in the other fail-safe control system, a fail-safe request state is denoted when the logic is 1.
The logic operation mentioned above includes a logic operation of a fail-safe request flag based on fault diagnosis of a control object to which a fail-safe control signal is output and a fail-safe request flag based on fault diagnosis of a diagnosis object.
Further, it is preferable to include a logic operation for clearing the fail-safe request based on the fault diagnosis. Systems for determining clear conditions may also be duplex to have logic for logic operation of the duplex systems may be mutually reverse.
Moreover, in duplex systems for outputting fail-safe requests, each of the two systems is preferably constructed to perform a logic operation of a fail-safe request of the other system and a fail-safe request of its own system.
Here, it is preferable that the diagnosis object is made a RAM used to control an electronic controlled throttle valve, and as a fail-safe control, a relay of a motor which drives the throttle valve to open/close is controlled to turn off.
These and other objects and aspects of the present invention will become apparent from the following explanations of the preferred embodiments of the invention with reference to the accompanied drawings.
REFERENCES:
patent: 9-287494 (1997-11-01), None
patent: 2000-76142-A (2000-03-01), None
Machida Kenichi
Moteki Norio
Dolinar Andrew M.
McDermott & Will & Emery
Unisia Jecs Corporation
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