Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2003-08-08
2008-08-26
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
Reexamination Certificate
active
07418577
ABSTRACT:
One embodiment of the present invention provides a system that supports executing a fail instruction, which terminates transactional execution of a block of instructions. During operation, the system facilitates transactional execution of a block of instructions within a program, wherein changes made during the transactional execution are not committed to the architectural state of the processor until the transactional execution successfully completes. If a fail instruction is encountered during this transactional execution, the system terminates the transactional execution without committing results of the transactional execution to the architectural state of the processor.
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Chaudhry Shailender
Jacobson Quinn A.
Tremblay Marc
Chan Eddie P
Fennema Robert E
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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