Fading circuit for video signals

Details Fading circuit for video signals Fading circuit for video signals

1985-04-08

1987-05-26

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

H04N 5265

Patent

active

046689893

ABSTRACT:
The fading circuit comprises first and second video signal inputs (1,12) for receiving 8 bit parallel digitally encoded video signals and first and second fading control signal inputs (5,16) for receiving 8 bit parallel fading control signals. First and second multipliers (4,15) multiply the video signals by the fading control signals. The outputs of the multipliers (4,15) are truncated to 9 bits and fed to first and second inputs of an adding arrangement (11). A dither signal is fed from a dither signal generator (22) to the carry input (24) of the adding arrangement (11). The output of the adding arrangement (11) is fed to a ROM (28) which is programmed to add 1/256th of the output of the adding arrangement (11) to the output of the adding arrangement (11) and produce an 8 bit output which is applied to the output (31) of the fading circuit. By adding the dither signal amplitude transitions in the output signal at particular settings of the fading control signals are blurred and do not produce such a disturbing effect on the display screen.

REFERENCES:
patent: 2233317 (1941-02-01), Konkle
patent: 2412279 (1946-12-01), Miller, Jr.
patent: 2964589 (1960-12-01), Walker
patent: 4223351 (1980-09-01), Tsujimura et al.

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