Factorized power architecture with point of load sine...

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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Reexamination Certificate

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06975098

ABSTRACT:
A Factorized Power Architecture (“FPA”) method and apparatus for supplying power to highly transient loads such as microprocessors includes a front end power regulator (“PRM) which provides a controlled DC bus voltage which is converted to the desired load voltage using a DC voltage transformation module (“VTM”) at the point of load. The VTM converts the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio K=Vout/Vinwhere Vin>Voutand with a low output resistance. The response time of the VTM, TVTMis less than the response time of the PRM, TPRM. A first capacitance, C1, across the load is made large enough to support the microprocessor current requirement within a time scale, T1, which is preferably greater than or equal to the characteristic open-loop response time of the VTM by itself, TVTM. A second capacitance, C2, at the input of the VTM is made large enough to support the microprocessor current requirement within a time scale, T2, which is preferably greater than or equal to the closed-loop response time of the front end power regulator, TPRM. Feedback may be provided from a feedback controller at the point of load to the front end or to upstream, on-board power regulator modules (“PRMs”) to achieve precise regulation. The VTM may convert power bi-directionally to return power to the bus during a “load dump.” Energy storage at the input to the VTM is greater than energy storage at the load.

REFERENCES:
patent: 3596165 (1971-07-01), Andrews
patent: 4293904 (1981-10-01), Brooks et al.
patent: 4443840 (1984-04-01), Geissler et al.
patent: 4459492 (1984-07-01), Rogowsky
patent: 4533986 (1985-08-01), Jones
patent: 4648017 (1987-03-01), Nerone
patent: 4761722 (1988-08-01), Pruitt
patent: 4841220 (1989-06-01), Tabisz et al.
patent: 4853832 (1989-08-01), Stuart
patent: 4855888 (1989-08-01), Henze et al.
patent: 4860184 (1989-08-01), Tabisz et al.
patent: 4931716 (1990-06-01), Jovanovic et al.
patent: 5006782 (1991-04-01), Pelly
patent: 5063338 (1991-11-01), Capel et al.
patent: 5179512 (1993-01-01), Fisher et al.
patent: 5274539 (1993-12-01), Steigerwald et al.
patent: 5434770 (1995-07-01), Dreifuerst et al.
patent: 5436550 (1995-07-01), Arakawa
patent: 5448467 (1995-09-01), Ferreira
patent: 5491388 (1996-02-01), Nobuyuki et al.
patent: 5514921 (1996-05-01), Steigerwald
patent: 5530635 (1996-06-01), Yashiro
patent: 5594635 (1997-01-01), Gegner
patent: 5615093 (1997-03-01), Nalbant
patent: 5631813 (1997-05-01), Ikeshita
patent: 5768117 (1998-06-01), Takahashi et al.
patent: 5991171 (1999-11-01), Cheng
patent: 5999417 (1999-12-01), Schlecht
patent: 6069811 (2000-05-01), Moriguchi et al.
patent: 6154381 (2000-11-01), Kajouke et al.
patent: 6198642 (2001-03-01), Kociecki
patent: 6222742 (2001-04-01), Schlecht
patent: 6310792 (2001-10-01), Drobnik
patent: 6330169 (2001-12-01), Mullett et al.
patent: 6381150 (2002-04-01), Telefus
patent: 6583999 (2003-06-01), Spindler et al.
patent: 6650556 (2003-11-01), Dinh et al.
patent: 19837639 (2000-03-01), None
patent: 0 550 167 (1993-07-01), None
patent: WO 98/11658 (1998-03-01), None
Harriman, Intel Corp., “New Control Method Boosts Multiphase Bandwidth,” Power Electronics Technology, Jan. 2003; pp. 36-45.
Morrison et al., “A New Modulation Strategy for a Buck-Boost Input AC/DC Converter,” IEEE Transactions on Power Electronics, vol. 16, No. 1, pp. 34-45, Jan. 2001.
Tabisz et al., “Present and Future of Distributed Power Systems,” APEC '92 Conference Proceedings, Mar. 1992, pp. 11-18.
Mweene et al, “A High-Efficiency 1.5 kW, 390-50V Half-Bridge Converter Operated at .100% Duty Ratio,” APEC '92 Conference Proceedings, Mar. 1992, pp. 723-730.
Choi et al., “Dynamics and Control of DC-to-DC Converters Driving Other Converters Downstream,” IEEE Transactions on Circuits and Systems—I: Fundamental Theory and Applications, Oct. 1999, pp. 1240-1248.
Lee et al., “Topologies and Design Considerations for Distributed Power Systems Applications,” Proceedings of the IEEE, Jun. 2001, pp. 939-950.
Steigerwald, “A Comparison of Half-Bridge Resonant Converter Topologies,” IEEE Transactions on Power Electronics, vol. 2, No. 2, Apr., 1988.
Baker, “High Frequency Power Conversion with FET-Controlled Resonant Charge Transfer,” PCI Proceedings, Apr. 1983.
Divan, “Design Considerations for Very High Frequency Resonant Mode DC/DC Converters,” IEEE Transactions on Power Electronics, vol. PE-2, No. 1, Jan., 1987.
Bo Yang et al., “LLC Resonant Converter for Front End DC-DC Conversion,” CPES Seminar 2001, Blacksburg, VA, Apr. 23, 2001, pp. 44-48.
Bo Yang et al., “Low Q Characteristic of Series Resonant Converter and Its Application,” CPES Seminar 2001, Blacksburg, VA, Apr. 23, 2001, pp. 170-173.
Palz, “Stromversorgung von Satelliten—Wanderfeldröhren hoher Leistung” (“Power Supply for Satellites—High Capacity Traveling-Wave Tubes”), Siemens Zeitschrift, vol. 48, Dec. 1974, pp. 840-846. (with English Translation).
Data sheet, “Preliminary Tech Spec, Narrow Input, Isolated DC/DC Bus Converter,” SynQor Document No. 005-2BQ512J, Rev. 7, Aug., 2002, pp. 1-7.
Erickson and Maksimovic, “Fundamentals of Power Electronics,” 2ndEdition, Kluwer Academic Publishers, Dec. 2001.
Hua et al., “Novel Zero-Voltage Transistion PWM Converters,” IEEE Transactions on Power Electronics, vol. 9, No. 2, Mar., 1994, p. 605.
Vinciarelli, Buck-Boost DC-DC Switching Power Conversion, U.S. patent application No. 10/214,859, filed Aug. 8, 2002. [00614-129001].
Colson, “Intel Platform Solutions,” Issue 23, Sep. 3, 1999, pp. 1, 20-21.
Reynolds, “Intel Development Forum Highlights: Fall 1999,” published by Gartner, Dataquest, Nov. 30, 1999.
Strassberg, “Tiny Titans: Choose 'Em and Use 'Em With Care,” EDN Magazine, May 2, 2002, pp. 41-42, 44, 46 & 48.
Morrison, “Distributed Power Moves to Intermediate Voltage Bus”, Electronic Design Magazine, Sep. 16, 2002, pp. 55, 58, 60 & 62.
Yao et al., “A Novel Resonant Gate Driver for High Frequency Synchronous Buck converters,” IEEE Transactions on Power Electronics, vol. 17, No. 2, Mar. 2002, pp. 180-186.
Stanford, “New Processors Will Require New Powering Technologies,” Power Electronics Technology Magazine, Feb. 2002, pp. 32-42.
Balogh, “Distributing On-Card Power—Choosing the Right Board-Level Architecture for a Range of Power Needs”, Texas Instruments, High-Performance Analog, Apec-'03, Miami, FL, pp. 1-24, Dec. 2003.
Ren et al., “A Novel Simple and High Efficiency ‘DC/DC Transformer’,” Center for Power Electronics Systems, CPES Seminar 2002, Blacksburg, VA, Apr. 14, 2002, pp. 173-177.
Weinberg et al., “A New Zero Voltage and Zero Current Power-Switching Technique,” IEEE Transactions on Power Electronics, vol. 7, No. 4, Oct. 1992, pp. 655-665.
Miller, “The Use of Resonant Circuits in Power Conditioning Equipment,” PCSC '71 Record, Dec. 1971, pp. 94-100.
Schwarz, “A Method of Resonant Current Pulse Modulation for Power Converters,” IEEE Transactions on Industrial Electronics and Control Instrumentation, vol. 4, No. 4, Oct. 1989, pp. 209-221.
Ray et al., “A Cascaded Schwarz Converter for High Frequency Power Distribution,” IEEE Transactions on Power Electronics, vol. 4, No. 4, Oct. 1989, pp. 478-485.
Schmidtner, “A New High Frequency Resonant Converter Topology,” HFPC, May 1988 Proceedings, pp. 390-403.
Batarseh, “Resonant Converter Topologies with Three and Four Energy Storage Elements,” IEEE Transactions on Power Electronics, vol. 9, No. 1, Jan. 1994, pp. 64-73.
Ye et al., “Investigation of Topology Candidates for 48V VRM,” 2002 APEC Conference, Mar. 2002.
Alou et al., “Bu

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