Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2002-02-21
2004-11-23
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S099000, C700S100000, C700S109000
Reexamination Certificate
active
06823228
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to fabricator capacity analysis, and more particularly, to a system and method for simplified fabricator capacity analysis.
2. Related Art
Fabricator capacity analysis is a very time-consuming and complex process. This is especially the case for a multi-technology, multi-part semiconductor fabricator. Current systems and methods evaluate the entire fabricator using very complex processing that considers practically every tool set within a fabricator, and a myriad of what-ifs.
Unfortunately, for larger semiconductor manufacturers, market dynamics and strategies require quicker decision making. For example, a quick determination is advantageous in deciding how best to use capacity to maximize profitability between products with different profit margins, technology complexities and capacity implications
In view of the foregoing, there is a need in the art for a system, method and program product for analyzing fabricator capacity in a simplified manner.
SUMMARY OF THE INVENTION
A first aspect of the invention is directed to a method of determining fabricator capacity for a wafer start loading over a set time period, the wafer start loading having a number of wafer starts, the method comprising the steps of: a) determining a common tool set capacity by dividing wafer starts that use common non-key shared tool sets by an overall capacity parameter, wherein the overall capacity parameter is based on a strategic characteristic wafer start loading; b) determining a technology capacity by dividing the wafer starts of each technology within the wafer start loading by a corresponding unique tool set capacity for the respective technology; and c) determining key shared tool set capacity by: i) determining a capacity consumption factor for each key shared tool set used by at least one process; ii) determining a capacity consumption of each key shared tool set used by a process of the wafer start loading; iii) decreasing a remaining capacity value for each key shared tool set used by the process of the wafer start loading by a corresponding capacity consumption; iv) repeating steps ii) and iii) for each process of the wafer start loading; and v) determining the amount of wafer start capacity available for each process by dividing each remaining capacity value by a corresponding capacity consumption factor for a corresponding process.
A second aspect of the invention is directed to a method of determining fabricator capacity for a wafer start loading, the method comprising the steps of: organizing each technology the fabricator can produce into a component technology-based process and related design-based processes; determining a capacity consumption factor for each tool set by process; determining a capacity consumption for each tool set by process for the wafer start loading; decreasing a remaining capacity value of each tool set by at least one corresponding capacity consumption; and determining tool set capacity remaining by each process for the wafer start loading by dividing the remaining capacity value for each tool set by a corresponding capacity consumption factor.
A third aspect of the invention is directed to a system for determining fabricator capacity for a wafer start loading, the system comprising: a common tool set capacity analyzer for determining the capacity of the fabricator based on at least one common shared tool set; a technology capacity analyzer for determining the capacity of the fabricator based on at least one technology unique tool set; and a key shared tool set capacity analyzer for determining the capacity of a key shared tool set.
A fourth aspect is directed to a computer program product comprising a computer useable medium having computer readable program code embodied therein for reporting on performance of a plurality of parameters, the program product comprising: a) program code configured to determine a common tool set capacity by dividing wafer starts that use common non-key shared tool sets by an overall capacity parameter, wherein the overall capacity parameter is based on a strategic characteristic wafer start loading; b) program code configured to determine a technology capacity by dividing the wafer starts of each technology within the wafer start loading by a corresponding unique tool set capacity for the respective technology; and c) program code configured to determine key shared tool set capacity including: i) program code configured to determine a capacity consumption factor for each key shared tool set used by a process that is required by the wafer start loading; ii) program code configured to determine a capacity consumption of each key shared tool set used by the process; iii) program code configured to decrease a remaining capacity value for each key shared tool set used by the process by a corresponding capacity consumption; iv) program code configured to execute program code i), ii) and iii) for each process required by the wafer start loading; and v) program code configured to determine the amount of wafer start capacity available for each process by dividing each remaining capacity value by a corresponding capacity consumption factor for a corresponding process.
A fifth aspect of the invention is directed to a system for determining fabricator capacity for a wafer start loading, the system comprising: means for determining a common tool set capacity of the fabricator based on at least one common shared tool set; means for determining a technology capacity of the fabricator based on at least one technology unique tool set; and means for determining the capacity of at least one key shared tool set based on processes required by the wafer start loading.
The foregoing and other features of the invention will be apparent from the following more particular description of embodiments of the invention.
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“Capacity Planning Model: The Important Inputs, Formulas, and Benefits”—Thomas J. Occhino, White Oak Semiconductor, IEEE 2000.*
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Funke Otto J.
Merrill, Jr. Edward F.
Sanghvi Manoj S.
Sisler Sharon B.
Thyng George E.
Hoffman, Warnick & D'Alessandro LLC
International Business Machines - Corporation
Kotulak Richard M.
Masinick Michael D.
Picard Leo
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