Fishing – trapping – and vermin destroying
Patent
1994-09-07
1995-07-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437176, 437912, 437203, 148DIG111, H01L 2144
Patent
active
054321263
ABSTRACT:
After forming a silicon oxide layer and an amorphous silicon layer on a GaAs substrate in stacking manner, a gate electrode forming opening portion is formed by RIE etching. Then, by selectively removing only the amorphous silicon layer at the portion contacting with the opening portion at the side of the source electrode, a WSi.cndot.TiN.cndot.Pt layer is formed within the opening portion. Subsequently, after applying an organic photoresist layer, an entire surface is etched back to remove at least the WSi.cndot.TiN.cndot.Pt layer above the amorphous silicon layer. Then, by using the WSi.cndot.TiN.cndot.Pt layer remaining in the opening portion as a plating electrode, an Au layer is plated to form a reversed L-shaped gate electrode with an overhanging portion only extending toward the source electrode.
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Hearn Brian E.
NEC Corporation
Radomsky Leon
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