Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-06-15
2001-03-13
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S106000
Reexamination Certificate
active
06200830
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a process for the fabrication of a semiconductor device comprising mounting a semiconductor element on both sides of a mother board or daughter board in a face-down structure.
BACKGROUND OF THE INVENTION
As a result of a recent request for the improvement in the performance of a semiconductor device, a process (flip chip method, direct chip attach method or the like) for mounting a semiconductor element on a mother board or daughter board having an interconnection circuit formed thereon has attracted attentions. Such a process is presumed to overcome the problems derived from the conventionally employed method, for example, a process for mounting a semiconductor element on a mother board or daughter board after forming a contact on a lead frame through a metal wire from a semiconductor device and being packaged.
The device having said semiconductor element mounted on the mother board or daughter board, on which an interconnection circuit has been formed, in a face-down structure is required to meet a tendency to higher integration of a semiconductor device. As one example which can meet such a request, a semiconductor device having a semiconductor element mounted, in a face-down structure, on both sides of an interconnection circuit substrate such as mother board or daughter board is considered.
As the fabrication process of a semiconductor device having a semiconductor element mounted on both sides, a process through the steps as described below can be conceived by way of example. Namely, as illustrated in
FIG. 9
, after subjecting at least one of one side of an interconnection circuit substrate
1
having an interconnection electrode formed on both sides thereof and a semiconductor element
3
having a connecting electrode portion
2
to flux treatment, the semiconductor element
3
having the connecting electrode portion
2
is mounted at a predetermined position on said one side of the interconnection circuit substrate
1
. At the same time, the interconnection electrode on the interconnection circuit substrate
1
and the connecting electrode portion
2
are connected by melting said connecting electrode portion
2
, whereby the semiconductor element
3
is fixed onto the interconnection circuit substrate
1
(flip chip bonding+infrared ray reflow). Then, the flux on the interconnection circuit substrate
1
and/or the semiconductor element
3
is washed (flux washing). After a liquid resin material is poured and filled, as illustrated in
FIG. 10
, in a space between the interconnection circuit substrate
1
and semiconductor element
3
, the whole body is heated to cure the liquid resin material, whereby the space portion is encapsulated with the resin. Indicated at numeral
6
in
FIG. 10
is an encapsulating resin layer.
On the other side of the interconnection circuit substrate
1
, another semiconductor element
3
is mounted in a similar step to that described above. Described specifically, as illustrated in
FIG. 11
, after subjecting at least one of the other side of the interconnection circuit substrate
1
and the another semiconductor element
3
having a connecting electrode portion
2
to flux treatment, the another semiconductor element
3
is mounted at a predetermined position on the other side of the interconnection circuit substrate
1
. At the same time, the interconnection electrode on the other side of the interconnection circuit substrate
1
and the connecting electrode portion
2
are connected by melting the connecting electrode portion
2
, whereby the another semiconductor element
3
is fixed onto the interconnection circuit substrate
1
(flip chip bonding +infrared ray reflow). Then, the flux on the other side of the interconnection circuit substrate
1
and/or the semiconductor element
3
is washed (flux washing). After the liquid resin material is poured and filled into a space between the other side of the interconnection circuit substrate
1
and the another semiconductor element
3
as illustrated in
FIG. 12
, the whole body is heated to cure the liquid resin material, whereby the space portion is encapsulated with the resin. Fabrication of a double-side flip chip mounted type semiconductor device having the semiconductor element
3
mounted on both sides of the interconnection circuit substrate
1
in this manner can be considered.
The above-described process is however accompanied with the problem that it needs many steps, which makes the fabrication very troublesome.
SUMMARY OF THE INVENTION
With the foregoing in view, the present invention has been complicated. An object of the present invention is to provide a process for the fabrication of a double-side flip chip mounted type semiconductor device without troublesome steps.
With a view to attaining the above object, the process for the fabrication of a semiconductor device according to the present invention has a constitution which comprises simultaneously or successively mounting a semiconductor element having a connecting electrode portion on both sides of an interconnection circuit substrate through an encapsulating resin layer and connecting the semiconductor element with an interconnection electrode on each of the both sides of the interconnection circuit substrate by making use of the adhesive force of the encapsulating resin layer.
Namely, a process for the fabrication of a semiconductor device according to the present invention comprises simultaneously or successively mounting a semiconductor element having a connecting electrode portion on both sides of an interconnection circuit substrate through an encapsulating resin layer in the uncured form and connecting the semiconductor element with an interconnection electrode on both sides of the interconnection circuit substrate by making use of the adhesive force of the encapsulating resin layer. This process therefore makes it possible to fabricate a double-side mounted type semiconductor device easily without a troublesome step such as a step of connecting the connecting electrode portion in a molten state with one side of the interconnection circuit substrate and carrying out resin encapsulating and then repeating the above-described operation for the other side of the interconnection substrate. A drastic simplification of processing steps can therefore be actualized.
In the above fabrication process, as a step for mounting the semiconductor element having an interconnection electrode portion on both sides of the interconnection circuit substrate through the encapsulating resin layer, for example, the semiconductor element having an interconnection electrode portion is fixed onto one side of the interconnection circuit substrate through the encapsulating resin layer in the uncured form; and then, another semiconductor element having an interconnection electrode portion is temporarily fixed onto the other side of the interconnection circuit substrate through another encapsulating resin layer in the uncured form. Use of such a temporarily fixing step makes it possible to fabricate a double-side mounted type semiconductor device easily without a troublesome step, whereby a drastic simplification of fabrication steps can be actualized.
Moreover, the present inventors have found during the completion of the present invention that the encapsulating of a space between the interconnection circuit substrate and semiconductor element with a resin can be carried out smoothly without forming voids and the like by using, as the encapsulating resin layer in the uncured form, an encapsulating resin sheet composed of an epoxy resin composition containing a predetermined amount of an inorganic filler having a maximum particle size adjusted to 100 &mgr;m or less.
REFERENCES:
patent: 5406124 (1995-04-01), Morita et al.
patent: 5594275 (1997-01-01), Kwon et al.
patent: 5641997 (1997-06-01), Ohta et al.
patent: 5940688 (1999-08-01), Higuchi et al.
patent: 6014318 (2000-01-01), Takeda
patent: 6046077 (2000-04-01), Baba
Ito Satoshi
Kuwamura Makoto
Mizutani Masaki
Noro Hiroshi
Nelms David
Nhu David
Nitto Denko Corporation
Sughrue Mion Zinn Macpeak & Seas, PLLC
LandOfFree
Fabrication process of a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabrication process of a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication process of a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2549622