Fabrication process for integrated circuit having photodiode...

Details Fabrication process for integrated circuit having photodiode... Fabrication process for integrated circuit having photodiode...

2006-09-26

2006-09-26

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Groove formation

C438S388000, C438S090000

Reexamination Certificate

active

07112461

ABSTRACT:
An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

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patent: 6580123 (2003-06-01), Thapar
patent: WO99/48152 (1999-09-01), None
“One-Device CMOS DRAM Cell With Buried Poly Trench and Drain Reach Through”, Apr. 1988, IBM Tech. Dis. Bull. (ITDB), vol. 30, No. 11, p. 451-2.
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“Vertical Conducting Connection to a Poly-Si Trench In Si,” IBM Technical Disclosure Bulletin, pp. 310-312, vol. 31, No. 12, May 1989.
Preliminary Search Report dated Oct. 19, 2001 for French Patent Application No. 0100420.

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