Fabrication process for a dielectric isolated complementary inte

Metal working – Method of mechanical manufacture – Assembling or joining

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29571, 29578, 29576B, 29580, 148 15, 148175, 148DIG85, 148DIG38, 148DIG135, 357 42, 357 50, 357 54, 357 55, 357 59, 156654, 156649, H01L 2176, H01L 21302, H01L 2138

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046240470

ABSTRACT:
A method for fabricating isolated regions for a dielectric isolated complementary integrated circuit which avoids the difficulty of mask alignment and patterning on a deeply etched uneven surface of the substrate by aligning the patterns before etching and thereby forming p-type and n-type islands at the same time. A poly-silicon layer is grown on the surface of the substrate covering the islands and the substrate is removed from its back surface, leaving the islands embedded in the poly-silicon layer which becomes a new substrate.

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Grove, "Physics and Technology of Semiconductor Devices", Fairchild Semiconductor, Palo Alto, Univ. of Cal., Berkeley, 1967, pp. 36-41.

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