Patent
1978-08-15
1980-10-21
Tupman, W. C.
29571, 29578, 29577R, H01L 2702
Patent
active
042297559
ABSTRACT:
A method of fabricating very large scale integrated circuits including N-channel silicon gate nonvolatile memory elements and additional peripheral transistor elements. The nonvolatile memory elements are fabricated as PDS protected drain-source devices composed of a variable threshold memory device having a thin silicon dioxide gate insulator in combination with a pair of fixed threshold devices having a thicker silicon dioxide gate insulator arranged with a common silicon nitride layer and common gate electrode. The additional fixed threshold peripheral transistors are fabricated without a silicon nitride layer. In addition, the method contains no processing steps subsequent to the fabrication of the PDS devices which necessitate the application of temperatures in excess of 900.degree. C.
REFERENCES:
patent: 3475234 (1969-10-01), Kerwin
patent: 3728784 (1973-04-01), Schmidt
patent: 4085498 (1978-04-01), Rideout
patent: 4161417 (1979-07-01), Yim
Hamann H. Fredrick
Rockwell International Corporation
Staas Harry John
Tupman W. C.
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