Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-03-13
2007-03-13
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S427000, C438S444000, C438S700000, C438S703000, C438S734000, C438S749000, C438S750000, C438S751000, C438S756000, C438S757000, C438S508000, C257SE21579
Reexamination Certificate
active
10931605
ABSTRACT:
Dual trench depths are achieved on the same wafer by forming an initial trench having a depth corresponding to the difference in final depths of the shallow and deep trenches. A second mask is used to open areas for the deep trenches over the preliminary trenches and for the shallow trenches at additional locations. Etching of the shallow and deep trenches then proceeds simultaneously.
REFERENCES:
patent: 6146970 (2000-11-01), Witek et al.
patent: 6492270 (2002-12-01), Lou
patent: 6673635 (2004-01-01), Hellig et al.
patent: 6940170 (2005-09-01), Parikh
patent: 2003/0077875 (2003-04-01), Mandelman et al.
Defibaugh Dodd
Gopinath Venkatesh P.
Hornback Verne
Le Ynhi
Lin Hong
Beyer Weaver & Thomas LLP
Fourson George
LSI Logic Corporation
Pham Thanh V.
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