Fabrication of three dimensional integrated circuit...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S106000, C438S108000, C156S060000

Reexamination Certificate

active

07622313

ABSTRACT:
A method of assembling an electronic device includes testing a first wafer of first die to identify the location of functional first die and dividing the first wafer into a set of panels, wherein a panel includes an M×N array of first die. A panel is bonded to a panel site of a second wafer to form a panel stack wherein a panel site defines an M×N array of second die in the second wafer. The panel stack is sawed into a devices comprising a first die bonded to a second die. Dividing the first wafer into panels may be done according statically or dynamically (to maximize the number of panels having a yield exceeding a specified threshold). Binning of the panels and panel sites according to functional die patterns may be performed to preferentially bond panels to panel sites of the same bin.

REFERENCES:
patent: 4939568 (1990-07-01), Kato et al.
patent: 4954875 (1990-09-01), Clements
patent: 5426072 (1995-06-01), Finnila
patent: 5563084 (1996-10-01), Ramm et al.
patent: 6226394 (2001-05-01), Wilson et al.
patent: 6344401 (2002-02-01), Lam
patent: 6664132 (2003-12-01), Buchner et al.
patent: 2003/0096454 (2003-05-01), Poo et al.
patent: 2004/0021479 (2004-02-01), Lin et al.
patent: 2004/0051547 (2004-03-01), Ma et al.
Hayashi et al., Fabrication of Three-Dimensional IC Using “Cumulatively Bonded IC” (CUBIC) Technology, Symposium on VLSI Technology, 1990, p. 95.
Hayashi et al., A New Three Dimensional IC Fabrication Technology, Stacking Thin Film Dual-CMOS Layers, IEDM, 1991, p. 657.
Reif, et al., Fabrication Technologies for Three-Dimensional Integrated Circuits, ISQED '02, IEEE 2002.
International Search Report and the Written Opinion of the International Searching Authority, Sep. 24, 2007.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Fabrication of three dimensional integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fabrication of three dimensional integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication of three dimensional integrated circuit... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4070630

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.