Fabrication of schottky-barrier MOS FETs

Details Fabrication of schottky-barrier MOS FETs Fabrication of schottky-barrier MOS FETs

1982-07-23

1984-12-04

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29591, 148187, H01L 2128

Patent

active

044855508

ABSTRACT:
Schottky-barrier MOS and CMOS devices are significantly improved by selectively doping the regions surrounding the Schottky-barrier source and drain contacts. For p-channel devices, acceptor doping is carried out in either a one-step or a two-step ion implantation procedure. For n-channel devices, donor doping is carried out in a two-step procedure. In each case, current injection into the channel is enhanced and leakage to the substrate is reduced while still maintaining substantial immunity to parasitic bipolar transistor action (MOS devices) and to latchup (CMOS devices).

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A. C. Adams, "Plasma Planarization", Solid State Technology, Apr., 1981, pp. 178-181.
M. P. Lepselter and S. M. Sze, "SB-IGFET: An Insulated-Gate Field Effect Transistor Using Schottky Barrier Contacts for Source and Drain", Proceedings of the IEEE, Aug. 1968, pp. 1400-1402.
R. L. Thornton, "Schottky-Barrier Elevation by Ion Implantation and Implant Segregation", Electronics Letters, vol. 17, No. 14, Jul. 9, 1981, pp. 485-486.

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