Fabrication of metal lines for semiconductor devices

Details Fabrication of metal lines for semiconductor devices Fabrication of metal lines for semiconductor devices

1985-07-31

1987-06-16

Larkins, William D.

357 15, 357 68, 357 71, H01L 2948, H01L 2350, H01L 2944, H01L 2980

Patent

active

046739602

ABSTRACT:
A method of fabricating MESFET devices having a submicron line gate electrode is disclosed. The method includes the formation of a single layer of resist material on a semiconductor surface; formation of a resist cavity through optical lithography, the cavity exposing a selected portion of the semiconductor surface; depositing by way of angled evaporation at least one gate wall within said resist cavity, the gate wall defining a shaped gate cavity; depositing gate electrode material within the gate cavity, and removing the resist material. In one embodiment of the invention the gate wall is removed from the gate electrode material, leaving a free-standing electrode. In another embodiment, the gate wall is a permanent part of the electrode structure.

REFERENCES:
patent: 4271424 (1981-06-01), Inayoshi
patent: 4337115 (1982-06-01), Ikeda et al.
patent: 4377899 (1983-03-01), Otani et al.
patent: 4481706 (1984-11-01), Roche
patent: 4532532 (1985-07-01), Jackson

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