Fabrication of junction field effect transistor with filled groo

Metal working – Method of mechanical manufacture – Assembling or joining

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29576W, 29578, 29580, 148187, H01L 21223, H01L 2131

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active

045437068

ABSTRACT:
Junction field effect transistor, specifically a static induction transistor and method of fabricating. A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. The surface of the low resistivity N-type layer is coated with silicon nitride, portions of the silicon nitride are removed, and the silicon is etched to form parallel grooves with interposed ridges of silicon. Silicon dioxide is grown in the grooves, removed from the end walls of the grooves, and P-type zones are formed at the end walls of the grooves. Metal contacts are applied to the P-type zones at the end walls of the grooves. The grooves are filled with filler material and materials are etched away to produce a flat, planar surface with low resistivity N-type silicon of the ridges exposed in the surface and with filler material in the grooves also exposed at the surface. A large area metal contact is applied which extends across the surface and makes ohmic contact to the low resistivity N-type silicon of all the ridges.

REFERENCES:
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patent: 4115793 (1978-09-01), Nishizawa
patent: 4199771 (1980-04-01), Nishizawa et al.
patent: 4262296 (1981-04-01), Shealy et al.
patent: 4326209 (1982-04-01), Nishizawa et al.
patent: 4375124 (1983-03-01), Cogan
patent: 4403396 (1983-09-01), Stein
patent: 4476622 (1984-10-01), Cogan
patent: 4505022 (1985-03-01), Briere
patent: 4506435 (1985-03-01), Pliskin et al.
Cogan et al., Internat. Electron Devices Meeting, Wa. D.C., Dec. 6, 1983, Paper 9.5, pp. 221-224.

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