Fabrication of integrated circuit inter-level dielectrics using

Details Fabrication of integrated circuit inter-level dielectrics using Fabrication of integrated circuit inter-level dielectrics using

1998-07-30

2000-05-02

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257763, 257764, H01L 2348

Patent

active

060576030

ABSTRACT:
A dielectric gap fill layer is deposited on a patterned metal layer, and planarized to enable controlling the thickness of a cap layer subsequently deposited therein with improved precision. A cap layer, having a substantially flat upper surface, is then deposited on the planarized gap fill layer. The patterned metal layer can include a graded Ti/TiN ARC for increased selectivity to the gap fill dielectric layer.

REFERENCES:
patent: 5548159 (1996-08-01), Jeng
patent: 5589712 (1996-12-01), Kawashima et al.
patent: 5702564 (1997-12-01), Shen

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