Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal
Patent
1982-06-21
1984-07-31
Saba, W. G.
Metal treatment
Process of modifying or maintaining internal physical...
Chemical-heat removing or burning of metal
29576E, 29576W, 29578, 148175, 156612, 156613, 156614, 357 49, 357 50, 427 86, H01L 21205, H01L 2176
Patent
active
044628471
ABSTRACT:
A method for the fabrication of microelectronic semiconductor circuits, including the concurrent low pressure deposition of monocrystalline and polycrystalline semiconductor material in a predetermined pattern. In a preferred embodiment, a dielectric isolated circuit is fabricated, by such selective epitaxial growth, and a subsequent oxidation of both the mono- and polycrystalline deposits. By controlling the ratio of the deposition rates, and by controlling the oxidation step, the poly deposit is substantially fully converted to oxide, while the mono is only partly oxidized, leaving a substantially coplanar, isolated matrix of passivated monocrystalline areas in which to fabricate circuit components for interconnection.
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Chang et al., "Fabrication for Junction Insulating Gate FET", I.B.M. Tech. Discl. Bull., vol. 13, No. 9, Feb. 1971, p. 2503.
"Schnelle I.sup.2 L-Schaltung", Neues Aus der Technik, Aug. 15, 1978, No. 4, (1 p.).
Keen Ralph
Thompson Stephen W.
Lashmit Douglas A.
Merrett N. Rhys
Saba W. G.
Sharp Melvin
Texas Instruments Incorporated
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