Fabrication of a via plug having high aspect ratio with a diffus

Details Fabrication of a via plug having high aspect ratio with a diffus Fabrication of a via plug having high aspect ratio with a diffus

1999-02-19

2000-07-04

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438725, 438785, H01L 21302

Patent

active

060838426

ABSTRACT:
A method for efficiently fabricating a via plug having high aspect ratio within an insulating layer with a diffusion barrier layer effectively surrounding the via plug. The method includes the steps of depositing a via photoresist layer over a first metal line of a first conductive material and etching a via hole in the via photoresist layer. The first conductive material of the first metal line is exposed at a bottom wall of the via hole. A via plug of a second conductive material is deposited into the via hole, and the via plug makes a conductive path with the first metal line. The via photoresist layer is then removed such that any side wall of the via plug is exposed. A first diffusion barrier layer is then deposited onto any exposed surface of the second conductive material of the via plug. A via insulating layer is then spin-coated to surround the via plug and a trench insulating layer is also deposited over the via insulating layer. A trench is then etched over the via plug having the first diffusion barrier layer, and the via plug with the first diffusion barrier layer is exposed as part of a bottom wall of the trench. A second diffusion barrier layer is then deposited onto the walls of the trench, and a third conductive material is deposited into the trench to form a second metal line. The second metal line makes a conductive path with the second conductive material of the via plug. Thus, the present invention avoids the prior art method of depositing a diffusion barrier layer into the via hole within a via insulating layer before filling the via hole with the via plug. With the present invention, a via plug with high aspect ratio may be efficiently formed with the diffusion barrier layer effectively surrounding the via plug.

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S. Lopatin, Y. Shacham-Diamand, V. Dubin, P.K. Vasudev, J. Pellerin, and B. Zhao, Electroless CoWP Barrier/Protection Layer Deposition for Cu Metallization, Mat. Res. Soc. Symp. Proc., vol. 451, 1997 Materials Research Society, pp. 463-468.

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